EP20K100QI240-2N vs EP20K100QC240-2 比較

詳細並排比較 EP20K100QI240-2N 由 Altera 與 EP20K100QC240-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP20K100QI240-2N EP20K100QI240-2N - 100K Gate APEX 20K FPGA | Altera

EP20K100QI240-2N - 100K Gate APEX 20K FPGA | Altera

EP20K100QI240-2N Obsolete

規格比較

參數 EP20K100QI240-2N EP20K100QC240-2
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete NRND
Product Family APEX 20K —
Device Type FPGA (Field Programmable Gate Array) Field Programmable Gate Array (FPGA)
Total System Gates 100K —
Logic Elements / Cells 4160 —
Embedded RAM Bits (max) 53248 —
Number of User I/Os 189 189
Number of Dedicated Inputs 4 —
Core Supply Voltage 2.5 V nominal (2.375 V to 2.625 V) —
Process Technology 0.22 um CMOS —
Maximum Internal Clock Frequency 200 MHz —
Package Code FQFP —
Package Form 240-Pin PQFP, fine-pitch flatpack, square —
Package Body Size 32 mm x 32 mm (Length 32 mm) —
Terminal Pitch 0.5 mm 0.5 mm
Terminal Form Gull wing —
安裝類型 Surface Mount Surface Mount
MSL 等級 [DATA_NEEDED: exact MSL for EP20K100QI240-2N; same PQFP listing indicates MSL 3] —
Operating Temperature Grade Industrial (I suffix) —
Core Supply Current [DATA_NEEDED: ICCINT] —
RoHS 狀態 [DATA_NEEDED: exact RoHS certificate] Unknown
Series — APEX-20K
Number of Logic Elements/Cells — 4160
Number of LABs/CLBs — 416
Total RAM Bits — 53248
Typical Gate Count — 100000
Maximum System Gates — 263000
工作電源電壓 — 2.375 V to 2.625 V (2.5 V nominal)
工作溫度範圍 — 0°C to 85°C (TJ)
Maximum Internal Frequency — 200 MHz
Propagation Delay — 3 ns
封裝 / 外殼 — 240-BFQFP (PQFP-240)
Number of Pins / Terminals — 240
Technology / Process — CMOS, 0.22 µm
Speed Grade — -2

資料表與資源

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