EP20K100QI240-2N vs EP20K100QI240-2V 比較

詳細並排比較 EP20K100QI240-2N 由 Altera 與 EP20K100QI240-2V 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。

Altera

EP20K100QI240-2N - 100K Gate APEX 20K FPGA | Altera

EP20K100QI240-2N Obsolete

Altera

EP20K100QI240-2V Obsolete

參數	EP20K100QI240-2N	EP20K100QI240-2V
品牌	Altera	Altera
類別	FPGA & CPLD	FPGA & CPLD
生命週期狀態	Obsolete	Obsolete
Product Family	APEX 20K	APEX 20K
Device Type	FPGA (Field Programmable Gate Array)	—
Total System Gates	100K	—
Logic Elements / Cells	4160	—
Embedded RAM Bits (max)	53248	—
Number of User I/Os	189	—
Number of Dedicated Inputs	4	—
Core Supply Voltage	2.5 V nominal (2.375 V to 2.625 V)	2.5 V
Process Technology	0.22 um CMOS	0.22 um CMOS
Maximum Internal Clock Frequency	200 MHz	—
Package Code	FQFP	—
Package Form	240-Pin PQFP, fine-pitch flatpack, square	—
Package Body Size	32 mm x 32 mm (Length 32 mm)	—
Terminal Pitch	0.5 mm	—
Terminal Form	Gull wing	—
安裝類型	Surface Mount	Surface Mount
MSL 等級	[DATA_NEEDED: exact MSL for EP20K100QI240-2N; same PQFP listing indicates MSL 3]	—
Operating Temperature Grade	Industrial (I suffix)	—
Core Supply Current	[DATA_NEEDED: ICCINT]	—
RoHS 狀態	[DATA_NEEDED: exact RoHS certificate]	[DATA_NEEDED: RoHS status]
Product Type	—	Field Programmable Gate Array (FPGA)
Total Gates	—	100K Gates
Logic Elements/Cells	—	4,160 Cells
Total RAM Bits	—	53,248 bits
Number of User I/O	—	189 I/O lines
Dedicated Inputs	—	4 dedicated inputs
Maximum Internal Frequency	—	200 MHz
Operating Supply Voltage Range	—	2.375 V to 2.625 V
封裝 / 外殼	—	240-Pin PQFP / 240-BFQFP
腳位數	—	240
Architecture	—	MultiCore with LUT logic, product-term logic, and embedded memory
工作溫度範圍	—	[DATA_NEEDED: operating temperature range in degrees C]