EP20K100QI240-2V vs EP20K100QC240-1XV 比較

詳細並排比較 EP20K100QI240-2V 由 Altera 與 EP20K100QC240-1XV 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP20K100QI240-2V EP20K100QI240-2V - FPGA APEX 20K 100K Gates | Altera

EP20K100QI240-2V - FPGA APEX 20K 100K Gates | Altera

EP20K100QI240-2V Obsolete

規格比較

參數 EP20K100QI240-2V EP20K100QC240-1XV
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Product Family APEX 20K —
Product Type Field Programmable Gate Array (FPGA) —
Total Gates 100K Gates —
Logic Elements/Cells 4,160 Cells —
Total RAM Bits 53,248 bits —
Number of User I/O 189 I/O lines —
Dedicated Inputs 4 dedicated inputs 4
Maximum Internal Frequency 200 MHz 250 MHz
Process Technology 0.22 um CMOS 0.22 um CMOS
Core Supply Voltage 2.5 V —
Operating Supply Voltage Range 2.375 V to 2.625 V —
封裝 / 外殼 240-Pin PQFP / 240-BFQFP —
腳位數 240 —
安裝類型 Surface Mount Surface Mount (gull-wing leads)
Architecture MultiCore with LUT logic, product-term logic, and embedded memory —
工作溫度範圍 [DATA_NEEDED: operating temperature range in degrees C] —
RoHS 狀態 [DATA_NEEDED: RoHS status] Non-compliant (legacy PQFP, non-LEAD-FREE process)
Series — APEX 20K
Device Family — APEX 20K (MultiCore architecture)
System Gates — 100,000 gates
Logic Elements (Cells) — 4,160
Embedded Memory — 53,248 bits
User I/Os — 189
PLLs — 4
Core Supply Voltage (VCCINT) — 2.5 V nominal (2.375 V to 2.625 V)
I/O Supply Voltage (VCCIO) — 3.3 V / 5 V tolerant
Propagation Delay (tpd) — 2.5 ns
封裝 — 240-pin PQFP (32 x 32 mm, 0.5 mm pitch)
工作溫度 — 0C to +85C (commercial) / -40C to +85C (industrial variant)
Configuration Interface — JTAG / serial (EPC configuration device)
生命週期狀態 — Obsolete / last-time-buy per Altera PCN

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