EP20K1500CF33C8 vs EP20K1500CF33C7ES 比較

詳細並排比較 EP20K1500CF33C8 由 Altera 與 EP20K1500CF33C7ES 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K1500CF33C8 EP20K1500CF33C7ES
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family APEX 20K APEX20K
Logic Elements / Cells 51,840 51840
Total RAM Bits 442,368 [DATA_NEEDED: total RAM bits]
Number of Gates (typical) 1,500,000 —
Number of I/O 808 (maximum user I/O) 808
Number of LABs/CLBs 2,592 LABs (organized in MegaLABs) —
Number of Embedded System Blocks 216 ESBs —
Number of PLLs 4 —
Supply Voltage (VCCINT) 1.8 V (typical for APEX 20K core) —
Supply Voltage (VCCIO) 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) —
工作溫度 0 °C to +85 °C (Commercial) 0C to +85C (commercial)
安裝類型 Surface Mount (BGA) Surface Mount
封裝 / 外殼 1020-BBGA, FCBGA (FineLine BGA) 1020-BBGA, FCBGA (FineLine BGA)
Number of Terminals 1020 balls —
Process Technology 0.18 µm CMOS, SRAM-based configuration —
Configuration SRAM-based, JTAG (IEEE 1149.1) —
RoHS 狀態 Compliant per distributor listings [DATA_NEEDED: RoHS status]
Lead-Free Yes (per distributor specifications) —
Series — APEX 20K
Manufacturer — Intel (formerly Altera)
Number of Gates — 1500000
Voltage - Supply — 2.5V core, 3.3V I/O
Supplier Device Package — 1020-BGA
Programmable Type — In System Programmable (SRAM-based)
Configuration Method — SRAM / JTAG
I/O Standards — LVTTL, LVCMOS, PCI, GTL, SSTL

資料表與資源

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