EP20K160EQC240-2 vs EP20K200EQC240-1 比較
詳細並排比較 EP20K160EQC240-2 由 Intel 與 EP20K200EQC240-1 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K160EQC240-2 | EP20K200EQC240-1 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX 20KE | — |
| Typical Gates | 160,000 | — |
| Logic Elements (LEs) | 6,400 | — |
| Embedded System Blocks (ESBs) | 64 | — |
| Maximum Embedded Memory | 56 Kbits (approx. 7 Kbytes usable) | — |
| Maximum User I/O (this package) | 175 | — |
| Maximum User I/O (largest package) | 271 | — |
| PLLs | 4 | — |
| Internal Frequency (max) | 160 MHz | — |
| Propagation Delay | 1.55 ns | 2.5 ns |
| Logic Family | CMOS | CMOS |
| Process Technology | 0.18-micron SRAM CMOS | — |
| 封裝 | PQFP-240 (QFP-240, FQFP) | 240-BFQFP (S-PQFP-G240) |
| 腳位數 | 240 | — |
| 安裝類型 | Surface Mount (Gull Wing) | Surface Mount |
| 工作溫度 | 0 C to 85 C (Commercial) | [DATA_NEEDED: temperature grade] |
| Speed Grade | -2 | -1 |
| Supply Voltage (core) | [DATA_NEEDED: core VCC value] | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, SSTL, GTL+, LVDS | — |
| Configuration Modes | Passive Serial, Passive Parallel Synchronous, JTAG | — |
| JTAG Support | IEEE Std. 1149.1 boundary-scan | — |
| RoHS 狀態 | Non-compliant (original Altera-era PQFP) | — |
| MultiCore Architecture | Yes (Logic + ESB + I/O) | — |
| 5.0 V Tolerance | Achievable with external resistor | — |
| Product Type | — | FPGA (Field Programmable Gate Array) |
| FPGA Family | — | APEX 20KE |
| Logic Elements | — | 8,320 |
| Total RAM Bits | — | 106,496 |
| Maximum User I/O | — | 168 |
| Number of Terminals | — | 240 |
| Package Body Size | — | 32 mm x 32 mm |
| Terminal Pitch | — | 0.5 mm |
| Terminal Form | — | Gull wing |
| Package Shape | — | Square |
| Core Supply Voltage | — | [DATA_NEEDED: core supply voltage] |
| I/O Supply Voltage | — | [DATA_NEEDED: I/O supply voltage] |