EP20K200CB356C7N vs EP20K200CB356C9 比較
詳細並排比較 EP20K200CB356C7N 由 Intel 與 EP20K200CB356C9 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EP20K200CB356C7N - APEX 20KC FPGA 200K Gates 356-BGA | Intel / Altera
EP20K200CB356C7N Obsolete
規格比較
| 參數 | EP20K200CB356C7N | EP20K200CB356C9 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Family | APEX 20KC | APEX 20KC |
| Series | EP20K200 | — |
| System Gates | 200,000 | — |
| Logic Elements / Cells | 8,320 | 8,320 |
| Maximum Operating Frequency | 3571.6 MHz (internal equivalent) | — |
| Propagation Delay | 1.48 ns | — |
| User I/Os | 263 | — |
| Input Terminals | 267 | — |
| Supply Voltage (Nominal) | 1.8 V | — |
| Process Technology | 0.15 um CMOS | 0.15 μm CMOS |
| 工作溫度 | 0C to +85C (Commercial) | 0 °C to +85 °C (commercial, C-grade) |
| 封裝 | 356-ball PBGA (S-PBGA) | — |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| Embedded Memory | ESBs (dual-port RAM/ROM/FIFO) | Embedded System Blocks (ESB) - dual-port RAM, ROM, CAM |
| Clock Management | PLL with up to 4 outputs | — |
| JTAG Support | Yes (IEEE 1149.1) | — |
| In-System Programmable | Yes | — |
| RoHS 狀態 | unknown | [DATA_NEEDED: RoHS compliance status] |
| Total RAM Bits | — | 106,496 |
| Typical Gate Count | — | 200,000 |
| Number of User I/O | — | 271 |
| Number of Logic Gates | — | [DATA_NEEDED: total usable gates] |
| Core Voltage | — | 1.8 V |
| Maximum Internal Frequency | — | 250 MHz |
| Package Type | — | 356-LBGA |
| 腳位數 | — | 356 |
| Configuration Method | — | SRAM-based, JTAG / passive serial / passive parallel |
| 生命週期狀態 | — | Not Recommended for New Designs (NRND) |