EP20K200CF484C8ES vs EP20K200FC484-3 比較
詳細並排比較 EP20K200CF484C8ES 由 Altera 與 EP20K200FC484-3 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EP20K200FC484-3 - APEX 20K 200K FPGA, 8320 Cells, BGA-484 | Intel (Altera)
EP20K200FC484-3 Nrnd規格比較
| 參數 | EP20K200CF484C8ES | EP20K200FC484-3 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | NRND |
| Series | APEX-20KC | — |
| Family | APEX 20K | APEX 20K |
| Logic Elements | 8,320 | — |
| System Gates | 200,000 | — |
| Embedded Memory (RAM bits) | 106,496 | — |
| Number of Logic Array Blocks (LABs) | 104 | — |
| Number of Embedded System Blocks (ESBs) | 13 | — |
| User I/O Pins (max) | 376 | — |
| PLLs | 4 | — |
| Core Voltage | 1.8 V | — |
| Speed Grade | C8 (-8 commercial) | -3 |
| 封裝 | 484-pin FBGA (FineLine BGA) | 484-pin FineLine BGA (FC) |
| 安裝類型 | Surface Mount | — |
| 工作溫度 | 0C to +85C (commercial) | 0 °C to 85 °C (commercial) |
| Process Node | 0.18 micron CMOS | — |
| Configuration Interface | JTAG (IEEE 1149.1) / Altera serial | JTAG (IEEE 1149.1) |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL, SSTL, HSTL, AGP | — |
| Lead Free / RoHS | [DATA_NEEDED: lead-free status] | — |
| Logic Elements / Cells | — | 8320 cells |
| Equivalent Gates | — | 200,000 gates |
| Macrocells | — | 832 |
| User I/Os | — | 382 |
| On-chip Memory | — | 106,496 bits |
| Process Technology | — | 0.22 µm CMOS |
| Core Supply Voltage | — | 2.5 V |
| Maximum Internal Frequency | — | 167 MHz |
| Propagation Delay (typical) | — | 2.5 ns |
| Architecture | — | MultiCore (LUT + product-term + ESB) |
| RoHS 狀態 | — | [DATA_NEEDED: rohs status] |