EP20K200CF672C7ES vs EP20K600CF672C7ES 比較
詳細並排比較 EP20K200CF672C7ES 由 Intel 與 EP20K600CF672C7ES 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K200CF672C7ES | EP20K600CF672C7ES |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 最後購買 |
| Family | APEX-II (EP20K) | APEX 20K |
| Logic Elements | 8,320 | — |
| Typical Gates | 200,000 | — |
| Embedded RAM (max) | 106,496 bits | — |
| Number of Logic Array Blocks (LABs) | 832 | — |
| Maximum User I/O Pins | 376 | — |
| Number of PLLs | 4 | — |
| 封裝 | 672-ball FineLine BGA | — |
| 安裝類型 | Surface Mount (BGA) | Surface Mount (BGA) |
| Core Voltage | 1.8 V | — |
| 工作溫度 | 0 °C to +85 °C (Commercial) | [DATA_NEEDED: operating temperature grade] |
| Speed Grade | 7 | — |
| Process Technology | 0.18 µm CMOS | 0.15 µm CMOS |
| 濕度敏感等級 (MSL) | 3 (168 Hours) | — |
| Packaging | Tray | — |
| Series | — | APEX 20KC |
| Logic Elements / Cells | — | 24320 |
| System Gates | — | 600000 |
| Maximum User I/O | — | 504 |
| Maximum Input Lines | — | 508 |
| Number of Macrocells | — | 504 |
| Maximum Operating Frequency | — | 375.94 MHz (per FPGAkey listing) |
| Propagation Delay | — | 1.6 ns |
| Internal Reference Clock | — | 1666.6 MHz |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| Package Type | — | FC-FBGA |
| Pin / Ball Count | — | 672 |
| Grade Suffix | — | ES (engineering sample / extended screening) |
| MSL 等級 | — | [DATA_NEEDED: MSL rating] |
| RoHS 狀態 | — | [DATA_NEEDED: RoHS compliance] |
| Configuration Memory | — | SRAM-based (volatile) |