EP20K200CQ208C7ES vs EP20K200CQ208C8N 比較

詳細並排比較 EP20K200CQ208C7ES 由 Altera 與 EP20K200CQ208C8N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP20K200CQ208C7ES EP20K200CQ208C7ES - APEX 20KC FPGA 200K Gates | Altera

EP20K200CQ208C7ES - APEX 20KC FPGA 200K Gates | Altera

EP20K200CQ208C7ES Obsolete
Altera
EP20K200CQ208C8N EP20K200CQ208C8N - APEX 20KC FPGA 1.8V | Altera

EP20K200CQ208C8N - APEX 20KC FPGA 1.8V | Altera

EP20K200CQ208C8N Obsolete

規格比較

參數 EP20K200CQ208C7ES EP20K200CQ208C8N
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
FPGA Family APEX 20KC —
Logic Elements 8320 —
Typical Gates 200K 200K gates
System Gates 526000 —
User I/O Count 136 —
Core Supply Voltage 1.8 V 1.8 V
Process Technology 0.15 um 0.15 um
Maximum Internal Clock 375.94 MHz —
Speed Grade C7 (from part number) —
Package Type 208-Pin PQFP (BFQFP) —
腳位數 208 —
安裝類型 Surface Mount Surface Mount
工作溫度 [DATA_NEEDED: operating temperature range in C] —
I/O Standards [DATA_NEEDED: supported I/O voltage standards] —
Embedded Memory [DATA_NEEDED: embedded memory bits] —
Configuration Voltage [DATA_NEEDED: configuration voltage levels] —
Device Family — APEX 20KC
Product Type — FPGA / Loadable PLD
Logic Elements / Cells — 8320
Total RAM Bits — 106496
User I/O Pins — 144
Dedicated Inputs — 4
Package Description — 208-Pin PQFP/BFQFP
Number of Terminals — 208
Terminal Form — Gull Wing
Package Shape — Square
Maximum Internal Frequency — 301.21 MHz
I/O Standard Support — [DATA_NEEDED: I/O standard support]
Embedded System Block Count — [DATA_NEEDED: ESB count]
工作溫度範圍 — [DATA_NEEDED: operating temperature range]
Configuration Scheme — [DATA_NEEDED: configuration scheme]
RoHS / Lead-Free Status — [DATA_NEEDED: RoHS status]

資料表與資源

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