EP20K200EBC652-3N vs EP20K300EBC652-3 比較
詳細並排比較 EP20K200EBC652-3N 由 Altera 與 EP20K300EBC652-3 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K200EBC652-3N | EP20K300EBC652-3 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Series | APEX 20KE (APEX-20KE®) | APEX 20KE |
| Device Family | EP20K200 | — |
| System Gates | 200,000 | — |
| Logic Elements / Cells | 8,320 | — |
| Logic Array Blocks (LABs) | 832 | — |
| Macrocells | 832 | — |
| Embedded RAM | 106,496 bits | — |
| User I/Os (DigiKey listing) | 376 | — |
| User I/Os (digchip listing) | 277 | — |
| Propagation Delay | 2.33 ns | — |
| Internal Frequency (max) | 189 MHz | — |
| Process Technology | 0.22 µm CMOS | — |
| Core Supply Voltage | 1.71 V to 1.89 V (nominal 1.8 V) | — |
| I/O Supply (LVDS-capable) | LVDS, 2.5 V referenced (per source variant) | — |
| 封裝 | 652-ball BGA | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Operating Temperature (TJ) | 0 °C to 85 °C (commercial) | — |
| Speed Grade | -3 (slowest in APEX 20KE family) | -3 |
| Configuration | JTAG (IEEE 1149.1), Passive Serial | — |
| RoHS 狀態 | Compliant | — |
| Product Type | — | FPGA - Field Programmable Gate Array |
| Manufacturer | — | Altera (Intel Programmable Solutions Group) |
| Number of Logic Elements | — | 11,520 |
| Number of Logic Array Blocks (LABs) | — | 1152 |
| Number of Macros | — | 1152 |
| Total RAM Bits | — | 147,456 |
| Number of User I/Os | — | 408 |
| 封裝 / 外殼 | — | 652-BGA (45x45 mm) |
| Supplier Device Package | — | 652-BGA |
| Voltage - Supply | — | 1.71 V to 1.89 V |
| 工作溫度 | — | 0 C to +85 C |
| Architecture | — | MultiCore (LUT + product-term + embedded memory) |
| I/O Standards Supported | — | LVDS, LVPECL, PCI, GTL+, SSTL-2/3, LVTTL |