EP20K300EFC672-2X vs EP20K300EFC672-2 比較
詳細並排比較 EP20K300EFC672-2X 由 Intel 與 EP20K300EFC672-2 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K300EFC672-2X | EP20K300EFC672-2 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX 20KE | APEX 20KE |
| Logic Elements | 11,520 | 11,520 |
| System Gates | 300,000 | 300,000 |
| Embedded Memory Bits | 147,456 bits | — |
| Maximum User I/O | 408 | 408 |
| 封裝 | 672-pin FBGA (Fine-pitch BGA) | 672-pin FineLine BGA (FBGA) |
| Process Technology | 0.22 µm CMOS | — |
| Core Supply Voltage | 1.8 V | 1.8 V |
| Maximum Internal Frequency | 350 MHz | 350 MHz |
| Propagation Delay | 1.68 ns | — |
| Speed Grade | -2 | — |
| PLLs | 4 | — |
| 工作溫度 | 0 °C to +85 °C (Commercial) | 0 °C to 85 °C (commercial) |
| Architecture | MultiCore (LUT + Embedded System Blocks) | — |
| JTAG Support | Yes (IEEE 1149.1) | — |
| Series | — | APEX 20K |
| Embedded Memory (ESB) | — | 147,456 bits |
| Propagation Delay (pin-to-pin) | — | 1.68 ns |
| Logic Family | — | CMOS |
| Core Process Technology | — | 0.22 µm |
| Configuration Interface | — | Passive Serial / EPC / JTAG (IEEE 1149.1) |
| Programming Tool | — | Quartus II / MAX+PLUS II |
| 安裝類型 | — | Surface Mount (BGA) |