EP20K300EQI240-3N vs EP20K300EQC240-3 比較
詳細並排比較 EP20K300EQI240-3N 由 Altera 與 EP20K300EQC240-3 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K300EQI240-3N | EP20K300EQC240-3 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX 20KE | APEX-20KE |
| Series | EP20K300 | — |
| System Gates | 300,000 | — |
| Logic Elements | 11,520 | — |
| Embedded Memory (bits) | 147,456 | 147,456 |
| Maximum User I/O | 152 | 152 |
| Dedicated Inputs | 4 | — |
| 封裝 | 240-pin BQFP/PQFP (PowerQuad Flat Pack) | 240-pin PQFP / BFQFP (240-BFQFP) |
| Process Technology | 0.22 µm CMOS | 0.22 um CMOS |
| Core Supply Voltage | 1.8 V nominal (1.71 V min, 1.89 V max) | — |
| I/O Standard Support | 1.5 V, 1.8 V, 2.5 V, 3.3 V (multi-volt I/O) | — |
| 工作溫度 | -40 °C to +105 °C (industrial 'I' grade) | 0C to +85C (commercial) |
| Speed Grade | -3 | -3 |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance from data] | [DATA_NEEDED: confirm for this date code] |
| Programming Interface | IEEE 1149.1 JTAG (ByteBlaster / MasterBlaster) | — |
| Typical Gates | — | 300,000 |
| Logic Elements / Cells | — | 11,520 |
| Number of PLLs | — | 4 |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage Tolerance | — | 2.5V / 3.3V / 5.0V compatible |
| Pin Pitch | — | 1.0 mm |
| Terminal Form | — | Gull Wing |
| 安裝類型 | — | Surface Mount |
| Programmable Logic Type | — | Loadable PLD |
| Architecture | — | MultiCore (LUT + Embedded System Blocks) |
| Configuration Interface | — | JTAG (IEEE 1149.1), passive serial |