EP20K30EFC324-1 vs EP20K60EFC324-2 比較
詳細並排比較 EP20K30EFC324-1 由 Altera 與 EP20K60EFC324-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K30EFC324-1 | EP20K60EFC324-2 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Manufacturer | Altera (now Intel) | — |
| Series | APEX-20K | APEX-20KE |
| Family | APEX-20KE (1.8V, LVDS) | — |
| Logic Elements (typical) | 30,000 (30KLE) | — |
| Typical Gates | [DATA_NEEDED: typical gate count] | — |
| Total RAM Bits | 24576 | 32,768 |
| Maximum User I/O | 128 | — |
| Core Supply Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| I/O Supply Voltage | [DATA_NEEDED: VCCIO range] | — |
| 封裝 | 324-FBGA (FineLine BGA, 19x19 mm) | — |
| 安裝類型 | Surface Mount | Surface Mount |
| 腳位數 | 324 | — |
| Temperature Grade | Commercial (per Altera family specification) | — |
| 工作溫度 | 0C to +85C (commercial grade per Altera family spec) | 0 C to 85 C |
| Process Technology | SRAM-based, 0.18 um | — |
| Configuration | Passive serial / passive parallel / JTAG | — |
| Lead-Free / RoHS | [DATA_NEEDED: RoHS compliance] | — |
| Speed Grade | -1 | -2 |
| MSL 等級 | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| PLLs | Up to 4 (per APEX-20KE family) | — |
| Product Type | — | FPGA (Field Programmable Gate Array) |
| Number of Logic Elements / Cells | — | 2,560 |
| Number of LABs / CLBs | — | 2,560 |
| Number of Gates | — | 162,000 |
| Number of User I/Os | — | 196 |
| Core Voltage - Supply | — | 1.71 V to 1.89 V |
| Internal Frequency (max) | — | 160 MHz |
| Propagation Delay | — | 1.72 ns |
| Logic Family | — | CMOS |
| 封裝 / 外殼 | — | 324-BGA |
| Supplier Device Package | — | 324-FBGA (19x19) |