EP20K400BC652-1V vs EP20K400BC652-3V 比較

詳細並排比較 EP20K400BC652-1V 由 Altera 與 EP20K400BC652-3V 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K400BC652-1V EP20K400BC652-3V
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Series APEX-20KC APEX-20K®
Family APEX 20K APEX 20K
Device Sub-Family EP20K400 —
System Gates 1,052,000 —
Maximum Logic Elements 212,992 —
Macrocells / LABs 16640 —
Embedded Memory (bits) 212,992 —
Maximum User I/O 502 —
Speed Grade -1 -3 (faster)
Clock-to-Output (Tco) 2.5 ns —
Core Voltage (VCCINT) 1.8 V —
I/O Voltage (VCCIO) 2.5 V —
封裝 652-BGA (FineLine, 45 x 45 mm) 652-ball BGA, 45 x 45 mm, 1.27 mm pitch
安裝類型 Surface Mount Surface Mount (BGA)
工作溫度 0C to +85C (commercial) 0 °C to 85 °C (commercial)
Configuration SRAM-based, JTAG IEEE 1149.1 —
Architecture MultiCore (LUT + product-term + ESB) —
RoHS 狀態 [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: check distributor listing]
Logic Cells / Elements — 16,640
Gates — 400,000
Total RAM Bits — 212,992
User I/Os — 502
Dedicated Inputs — 4
Maximum Operating Frequency — 167 MHz
Propagation Delay — 3.6 ns (per MicrochipUSA)
Core Supply Voltage (VCCINT) — 2.375 V to 2.625 V (nominal 2.5 V)
I/O Supply Voltage (VCCIO) — [DATA_NEEDED: banked VCCIO range]
Process Technology — 0.22 µm CMOS

資料表與資源

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