EP20K400CF672C7 vs EP20K400CF672C8AA 比較

詳細並排比較 EP20K400CF672C7 由 Altera 與 EP20K400CF672C8AA 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K400CF672C7 EP20K400CF672C8AA
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Series APEX-20KC —
Family APEX 20KC (MultiCore™) APEX 20K
Logic Elements / Cells 16,640 —
System Gates 400,000 —
Embedded Memory (RAM bits) 212,992 —
Maximum User I/O 488 —
Number of I/O Banks 8 —
封裝 672-BBGA (FC-FBGA, FineLine BGA) —
腳位數 672 —
Core Voltage 1.8 V —
供應電壓 2.5 V (I/O reference) —
Process Technology 0.15 µm CMOS —
Propagation Delay (tPD) 2.5 ns —
Maximum Internal Frequency 375.94 MHz —
工作溫度 0 °C to +85 °C (Commercial, C-grade) 0 C to 85 C (Commercial)
PLL Count 4 —
Speed Grade -7 —
安裝類型 Surface Mount (BGA) Surface Mount
RoHS 狀態 Non-compliant (legacy product) [DATA_NEEDED: RoHS status]
Lead-Free Contains lead (legacy BGA finish) —
Number of Logic Elements/Cells — 16640
Number of Logic Units (LEs) — [DATA_NEEDED: number of LUs]
Embedded System Blocks (ESBs) — 212
On-chip RAM Bits — [DATA_NEEDED: total embedded memory bits]
Number of User I/O Pins — 488
Package Type — 672-ball Fine-Pitch BGA (FBGA)
Number of Pins/Balls — 672
Supply Voltage (Core) — 2.5 V
I/O Standards Supported — LVTTL, LVCMOS, PCI, SSTL, HSTL (multi-voltage I/O)
Propagation Delay — [DATA_NEEDED: typical propagation delay]
Packaging — Tray
濕度敏感等級 (MSL) — 3 (168 Hours)
Configuration Interface — JTAG (IEEE 1149.1), passive serial, passive parallel asynchronous

資料表與資源

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