EP20K400CF672C8ES vs EP20K400CF672C7 比較

詳細並排比較 EP20K400CF672C8ES 由 Altera 與 EP20K400CF672C7 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K400CF672C8ES EP20K400CF672C7
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family APEX 20KC APEX 20KC (MultiCore™)
Series EP20K400 APEX-20KC
Logic Cells / Macros 16,640 —
System Gates (typical) 400,000 —
System Gates (maximum) 212,992 [DATA_NEEDED: confirm datasheet interpretation] —
Maximum User I/O 488 (per Globalspec) / 484 (per Microchip USA) [DATA_NEEDED: confirm canonical value] 488
Bidirectional I/O 484 —
Propagation Delay 2.5 ns —
Maximum Internal Frequency 301.21 MHz 375.94 MHz
Process Technology 0.15 µm CMOS 0.15 µm CMOS
Nominal Supply Voltage 1.8 V —
Supply Voltage Range 1.71 V to 1.89 V —
工作溫度 0°C to 85°C (Commercial) 0 °C to +85 °C (Commercial, C-grade)
封裝 672-BGA FineLine (FC-FBGA / S-PBGA-B672) 672-BBGA (FC-FBGA, FineLine BGA)
Logic Family CMOS —
Architecture MultiCore™ (LUT + Embedded System Block) —
Programming Method JTAG / in-system via configuration memory —
RoHS 狀態 [DATA_NEEDED: not stated in verified data] Non-compliant (legacy product)
Logic Elements / Cells — 16,640
System Gates — 400,000
Embedded Memory (RAM bits) — 212,992
Number of I/O Banks — 8
腳位數 — 672
Core Voltage — 1.8 V
供應電壓 — 2.5 V (I/O reference)
Propagation Delay (tPD) — 2.5 ns
PLL Count — 4
Speed Grade — -7
安裝類型 — Surface Mount (BGA)
Lead-Free — Contains lead (legacy BGA finish)

資料表與資源

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