EP20K400CF672I7 vs EP20K400CF672C7ES 比較

詳細並排比較 EP20K400CF672I7 由 Intel 與 EP20K400CF672C7ES 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K400CF672I7 EP20K400CF672C7ES
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family APEX 20KC APEX 20KC
Logic Elements 16,640 —
Maximum System Gates 400,000 —
Embedded Memory (ESB) 212,992 bits —
Maximum User I/O Pins [DATA_NEEDED: pin count for CF672 package] —
Process Technology 0.15 um CMOS 0.18 um CMOS
Core Supply Voltage 1.8 V —
I/O Supply Voltage 1.8 V / 3.3 V —
PLL Count 4 —
工作溫度 -40 C to +85 C (industrial) 0C to +85C (commercial)
Speed Grade I7 C7 (commercial, -7)
封裝 672-ball FC-FBGA (Fine-pitch Chip-Scale BGA) —
Terminal Finish Tin/Lead (Sn/Pb) —
JESD-609 Code e0 —
濕度敏感等級 (MSL) 3 —
Configuration Mode PS / AS / JTAG (IEEE 1149.1) —
Series — EP20K400
Device Type — Loadable PLD / FPGA
Logic Elements (Cells) — 16,640
System Gates — 400,000
Embedded Memory (Bits) — 212,992
Total RAM Bits — 212,992
Maximum User I/O — 488
I/O Lines — 484
Input Lines — 488
Number of PLLs — 4
Maximum Internal Clock Frequency — 375.94 MHz
Propagation Delay — 1.4 ns
Core Voltage — 1.8 V
MultiVolt I/O — 1.5 V / 1.8 V / 2.5 V / 3.3 V
Package Type — 672-ball FineLine BGA
Package Code — FC-FBGA-B672
Ball Pitch — 1.000 mm
安裝類型 — Surface Mount
RoHS 狀態 — [DATA_NEEDED: RoHS compliance]

資料表與資源

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