EP20K400FC672-1XGZ vs EP20K400CFC672-9 比較
詳細並排比較 EP20K400FC672-1XGZ 由 Intel 與 EP20K400CFC672-9 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EP20K400FC672-1XGZ - 400K Gate APEX-20KE FPGA, 502 I/O, 672-FBGA | Intel
EP20K400FC672-1XGZ Obsolete
規格比較
| 參數 | EP20K400FC672-1XGZ | EP20K400CFC672-9 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Family | APEX-20KE | APEX-20KC |
| Logic Elements / Cells | 16,640 | — |
| System Gates | 400,000 (typical) | — |
| Embedded Memory Bits | 212,992 | — |
| Maximum User I/O | 502 | — |
| 封裝 | 672-pin FBGA (Fine-pitch BGA) | 672-ball FineLine BGA (FCBGA) |
| 工作溫度 | 0C to +85C (commercial) | — |
| Core Supply Voltage | 2.5 V | 1.71 V to 1.89 V |
| Propagation Delay | 2.5 ns (per DigiChip listing) | — |
| Logic Family / Process | CMOS | — |
| Speed Grade | -1 (slowest commercial bin) | -9 (commercial, slowest bin) |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| MSL 等級 | [DATA_NEEDED: MSL level per JEDEC J-STD-020] | — |
| RoHS 狀態 | Unknown (legacy part, pre-dates widespread RoHS conversion) | [DATA_NEEDED: RoHS status] |
| Configuration Method | JTAG / passive serial / passive parallel (per APEX-20KE handbook) | EPC serial device or JTAG |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL+ (per APEX-20KE family datasheet) | — |
| Logic Elements / Macrocells | — | 1664 |
| Typical Gate Count | — | 400,000 gates |
| Embedded Memory (ESB) | — | 212,992 bits |
| User I/O Count | — | 488 |
| PLLs | — | 4 |
| I/O Supply Voltage | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Operating Temperature (TJ) | — | 0 °C to 85 °C |
| Package Body Size | — | 27 mm × 27 mm |
| Process Node | — | [DATA_NEEDED: process node] |