EP20K400FC672-1XGZ vs EP20K400EFC672-2X 比較
詳細並排比較 EP20K400FC672-1XGZ 由 Intel 與 EP20K400EFC672-2X 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EP20K400FC672-1XGZ - 400K Gate APEX-20KE FPGA, 502 I/O, 672-FBGA | Intel
EP20K400FC672-1XGZ Obsolete規格比較
| 參數 | EP20K400FC672-1XGZ | EP20K400EFC672-2X |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Family | APEX-20KE | APEX-20KE |
| Logic Elements / Cells | 16,640 | 16,640 |
| System Gates | 400,000 (typical) | — |
| Embedded Memory Bits | 212,992 | — |
| Maximum User I/O | 502 | — |
| 封裝 | 672-pin FBGA (Fine-pitch BGA) | — |
| 工作溫度 | 0C to +85C (commercial) | 0 C to 85 C (TJ) |
| Core Supply Voltage | 2.5 V | — |
| Propagation Delay | 2.5 ns (per DigiChip listing) | 2.5 ns |
| Logic Family / Process | CMOS | — |
| Speed Grade | -1 (slowest commercial bin) | — |
| 安裝類型 | Surface Mount | Surface Mount |
| MSL 等級 | [DATA_NEEDED: MSL level per JEDEC J-STD-020] | — |
| RoHS 狀態 | Unknown (legacy part, pre-dates widespread RoHS conversion) | [DATA_NEEDED: RoHS compliance] |
| Configuration Method | JTAG / passive serial / passive parallel (per APEX-20KE handbook) | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL+ (per APEX-20KE family datasheet) | — |
| Series | — | APEX-20KE |
| Manufacturer | — | Intel (formerly Altera) |
| Number of LABs/CLBs | — | 1,664 |
| Total RAM Bits | — | 212,992 |
| Number of I/O | — | 488 |
| Number of Gates | — | 1,052,000 |
| 供應電壓 | — | 1.71 V to 1.89 V (core); 3.3 V I/O |
| Logic Family | — | CMOS |
| Process Technology | — | 0.22 um / 0.18 um CMOS |
| Package Type | — | 672-BBGA / 672-FBGA |