EP20K400FI672-2N vs EP20K400FC672-2 比較
詳細並排比較 EP20K400FI672-2N 由 Altera 與 EP20K400FC672-2 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K400FI672-2N | EP20K400FC672-2 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | APEX 20K | APEX-20K (MultiCore) |
| Typical Gates | 400,000 | — |
| Logic Elements / Cells | 16,640 | 16640 |
| Maximum User I/O | 488 | 502 |
| Embedded Memory Bits | 212,992 bits | — |
| Embedded Array Blocks (EABs) | [DATA_NEEDED: EAB count per family datasheet] | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Core Voltage | 2.5 V | — |
| Maximum Frequency | 200 MHz | — |
| 封裝 | 672-pin FC-FBGA (Flip-Chip Fine-pitch BGA) | 672-ball FC-FBGA (BBGA) |
| Package Body Size | 27 x 27 mm | — |
| Terminal Pitch | 1.0 mm | — |
| Propagation Delay | 3.1 ns | — |
| Speed Grade | -2 | -2 |
| 工作溫度 | Commercial (0 °C to +70 °C) [DATA_NEEDED: industrial variant] | 0°C to +85°C (Commercial) |
| 濕度敏感等級 (MSL) | 3 | — |
| Peak Reflow Temperature | 220 °C | — |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | Compliant (lead-free) | [DATA_NEEDED: RoHS status] |
| Configuration Modes | PS, PPS, PPA, JTAG | — |
| Supported I/O Standards | LVTTL, LVCMOS, SSTL, HSTL | — |
| Series | — | APEX-20K |
| Number of Macrocells | — | 1664 |
| Number of Logic Blocks | — | [DATA_NEEDED: LAB count] |
| Number of Gates | — | 400000 |
| Embedded Memory (Bits) | — | 212992 |
| Number of I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| Operating Frequency (Max) | — | 200 MHz |
| Propagation Delay (tpd) | — | 2.5 ns |
| Core Supply Voltage | — | 2.5 V |