EP20K400FI672-2X vs EP20K400FG672-2 比較
詳細並排比較 EP20K400FI672-2X 由 Intel 與 EP20K400FG672-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K400FI672-2X | EP20K400FG672-2 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | APEX 20K | APEX 20K |
| Logic Elements | 16,640 | 21,500 |
| Typical Gates | 400,000 system gates | — |
| Embedded Memory | 212,992 bits | — |
| User I/O Pins | 496 | — |
| 封裝 | 672-ball BGA (FI672) | 672-ball FineLine BGA (FG672) |
| Package Code | BGA | — |
| Terminal Form | Ball | — |
| No. of Terminals | 672 | — |
| Package Shape | Square | — |
| Speed Grade | -2X | -2 |
| 工作溫度 | -40C to +85C (industrial) | 0C to +85C (commercial) |
| Core Voltage | 1.8 V | 2.5 V (2.375 V to 2.625 V) |
| I/O Voltage Support | 1.8V / 2.5V / 3.3V / 5V (MultiVolt) | — |
| Configuration Method | SRAM (serial EPROM or JTAG) | — |
| JTAG Support | Yes (IEEE 1149.1) | — |
| Process Technology | 0.18 um CMOS, 6-metal | 0.18 micron CMOS |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | non_compliant (legacy) |
| Maximum System Gates | — | 1,060,000 (typ 400,000) |
| Embedded System Blocks (ESBs) | — | 488 |
| Maximum RAM Bits | — | 212,992 |
| Macros / Logic Elements | — | 16,640 |
| Maximum User I/O | — | 488 |
| Propagation Delay | — | 3.1 ns (typ) |
| Maximum Internal Clock Frequency | — | [DATA_NEEDED: maximum internal clock frequency] |
| 安裝類型 | — | Surface Mount |
| Toolchain Support | — | Quartus II / MAX+PLUS II only |