EP20K400FI672-3V vs EP20K400FI672-2V 比較
詳細並排比較 EP20K400FI672-3V 由 Intel 與 EP20K400FI672-2V 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K400FI672-3V | EP20K400FI672-2V |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Family | APEX 20K (EP20K400) | APEX 20K |
| Logic Elements | 16,640 | — |
| Maximum Gates | 400,000 | — |
| Typical Gates | [DATA_NEEDED: typical gates value] | — |
| Embedded Memory (bits) | 212,992 | — |
| Maximum User I/O | 502 | — |
| Dedicated Inputs | 6 | — |
| Total User I/O + Dedicated Inputs | 496 + 6 (variant dependent) | — |
| 最大時脈頻率 | 714.2 MHz | — |
| Speed Grade | -3 (faster) | — |
| Core Voltage (VCCINT) | 2.5 V nominal (2.375 V to 2.625 V) | — |
| Process Technology | 0.18 µm CMOS, 4 metal layers | 0.22 µm CMOS |
| 封裝 | 672-ball FineLine BGA (BBGA), 1.0 mm pitch | 672-BBGA, FCBGA |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| Programmable via JTAG | Yes (IEEE 1149.1) | — |
| Supported I/O Standards | LVCMOS, LVTTL, SSTL, GTL+, HSTL | — |
| Configuration Modes | JTAG, passive serial, passive parallel | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs] |
| 工作溫度 | -40 °C to +85 °C (industrial) | 0 °C to +85 °C |
| MSL 等級 | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: msl] |
| Device | — | EP20K400 |
| Logic Elements / Cells | — | 16640 |
| Total System Gates | — | 400000 |
| Embedded Memory Bits | — | 212992 |
| Number of I/O | — | 502 |
| Pin / Ball Count | — | 672 |
| 供應電壓 | — | 2.5 V |
| Propagation Delay | — | 2.5 ns |
| Internal Operating Frequency | — | 200 MHz |
| Logic Family | — | CMOS |
| Configuration Mode | — | Serial / Parallel / JTAG |