EP20K400GC655-1X vs EP20K400GI655-1X 比較
詳細並排比較 EP20K400GC655-1X 由 Altera 與 EP20K400GI655-1X 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP20K400GI655-1X - 400K Gate APEX 20K FPGA, 16640 Logic Elements, 655-Pin CPGA | Altera (Intel)
EP20K400GI655-1X Obsolete規格比較
| 參數 | EP20K400GC655-1X | EP20K400GI655-1X |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Product Family | Altera APEX 20K | — |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| Technology | CMOS | — |
| Gate Count | 400K gates | — |
| Logic Elements | 16640 cells | 16640 |
| Maximum System Frequency | 250 MHz | — |
| Propagation Delay | 2.5 ns | 2.5 ns (typical for -1 grade) |
| Core Supply Voltage | 2.5 V | — |
| I/O Supply Voltage | 2.5 V / 3.3 V | — |
| Number of User I/O | 496 | — |
| Number of Dedicated Inputs | 6 | — |
| Number of Terminals | 655 | 655 |
| Package Type | CPGA-655 (Ceramic Pin Grid Array) | Ceramic Pin Grid Array (CPGA) |
| Package Body Material | Ceramic | CERAMIC (metal-sealed co-fired) |
| Process Technology | 0.22 um | CMOS, SRAM-based configuration |
| 工作溫度範圍 | [DATA_NEEDED: operating temperature range] | — |
| Embedded RAM Bits | [DATA_NEEDED: embedded RAM bits] | — |
| RoHS 狀態 | unknown | Compliant |
| Family | — | APEX 20K |
| Device | — | EP20K400 |
| User I/O Lines | — | 502 |
| Dedicated Inputs | — | 4 |
| Package Code (JESD-30) | — | S-CPGA-P655 |
| Package Equivalence Code | — | SPGA655,47X47 |
| Speed Grade | — | -1 |
| 濕度敏感等級 (MSL) | — | 1 |
| Peak Reflow Temperature | — | 220 C |
| 工作溫度 | — | -40 C to +85 C (industrial) |
| 安裝類型 | — | Through-Hole (PGA) |