EP20K400GC655-2X vs EP20K400GC655-1X 比較
詳細並排比較 EP20K400GC655-2X 由 Altera 與 EP20K400GC655-1X 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K400GC655-2X | EP20K400GC655-1X |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX 20K | — |
| Series | APEX-20KC® | — |
| Logic Elements / Cells | 16640 | — |
| System Gates | 400000 | — |
| Total RAM Bits | 212992 | — |
| Number of I/O | 496 | — |
| Number of Dedicated Inputs | 6 | 6 |
| Number of LABs/CLBs | [DATA_NEEDED: number of Logic Array Blocks] | — |
| Number of EABs | [DATA_NEEDED: number of Embedded Array Blocks] | — |
| Maximum Operating Frequency | 200 MHz | — |
| Process Technology | 0.22 µm CMOS | 0.22 um |
| Core Supply Voltage | 2.5 V | 2.5 V |
| I/O Supply Voltage (MultiVolt) | 2.5 V / 3.3 V / 5 V | — |
| Package Type | 655-BCPGA (SPGA655) | CPGA-655 (Ceramic Pin Grid Array) |
| Package Body Material | CERAMIC, metal-sealed cofired grid array | Ceramic |
| Package Dimensions | 47 x 47 mm | — |
| Peak Reflow Temperature | 220 °C | — |
| 安裝類型 | Through-hole (CPGA) | — |
| Programmability | In-system, JTAG (IEEE 1149.1) | — |
| 工作溫度 | [DATA_NEEDED: temperature grade] | — |
| RoHS 狀態 | unknown | unknown |
| Product Family | — | Altera APEX 20K |
| Device Type | — | Field Programmable Gate Array (FPGA) |
| Technology | — | CMOS |
| Gate Count | — | 400K gates |
| Logic Elements | — | 16640 cells |
| Maximum System Frequency | — | 250 MHz |
| Propagation Delay | — | 2.5 ns |
| I/O Supply Voltage | — | 2.5 V / 3.3 V |
| Number of User I/O | — | 496 |
| Number of Terminals | — | 655 |
| 工作溫度範圍 | — | [DATA_NEEDED: operating temperature range] |
| Embedded RAM Bits | — | [DATA_NEEDED: embedded RAM bits] |