EP20K400GC655-3 vs EP20K400GC655-3V 比較
詳細並排比較 EP20K400GC655-3 由 Intel 與 EP20K400GC655-3V 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K400GC655-3 | EP20K400GC655-3V |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Series | APEX-20KC | APEX-20KC |
| Family | APEX 20K | APEX 20KC (Apex 20KE Device Family, 1.8 V, LVDS) |
| Manufacturer | Intel (formerly Altera) | Altera (now Intel) |
| Logic Elements | 16640 | 16640 |
| Total RAM Bits | 212992 | 212992 |
| Number of Gates | 400000 | — |
| Supply Voltage - Core | 1.71 V to 1.89 V (1.8 V nominal) | — |
| I/O Voltage Tolerance | MultiVolt I/O: 1.8 V / 2.5 V / 3.3 V / 5 V | — |
| 工作溫度 | -40C to +85C (industrial) | [DATA_NEEDED: commercial / industrial / military grade] |
| Maximum Frequency | 167 MHz (per FPGAkey) | — |
| Process Technology | 0.22 um CMOS | CMOS |
| 封裝 / 外殼 | 655-BCPGA | — |
| Supplier Device Package | 655-CPGA (62.48 x 62.48 mm) | — |
| Speed Grade | -3 (slowest grade in family) | -3V (commercial temperature, Vcc 1.8 V) |
| Propagation Delay (tPD) | 3.6 ns (per Microchip USA listing) | — |
| JTAG Support | IEEE 1149.1 Boundary-Scan | Yes (IEEE 1149.1 boundary-scan) |
| Configuration Modes | Passive Serial, Passive Parallel Sync/Async, Active Serial | — |
| RoHS 狀態 | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS compliance flag - BCPGA package often non-RoHS] |
| Core Supply Voltage | — | 1.71 V to 1.89 V (1.8 V nominal) |
| Typical Gate Count | — | 400000 |
| Number of User I/O | — | 496 |
| 最大時脈頻率 | — | 714.2 MHz |
| Propagation Delay | — | 3.6 ns |
| 封裝 | — | 655-BCPGA (62.48 mm x 62.48 mm) |
| Package Equivalence Code | — | SPGA655, 47x47 |
| 安裝類型 | — | Through Hole (CPGA) |
| Peak Reflow Temperature | — | 220 C |
| Configuration | — | SRAM-based (requires EPC configuration device) |