EP20K600CB652C-8 vs EP20K600CB652C8N 比較

詳細並排比較 EP20K600CB652C-8 由 Altera 與 EP20K600CB652C8N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K600CB652C-8 EP20K600CB652C8N
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Series APEX 20KC —
Family APEX 20KC (MultiCore) APEX 20KC
Typical Gates 600,000 —
Logic Elements 24,320 24,320 cells
Embedded RAM 311,296 bits —
User I/Os 488 —
Propagation Delay 1.48 ns (per published source) —
封裝 652-BGA (LBGA, 45 x 45 mm, 1.27 mm pitch) 652-ball LBGA, 45 x 45 mm, 1.27 mm pitch
安裝類型 Surface Mount (thermally enhanced) Surface Mount (BGA)
工作溫度 0 C to 85 C (commercial) 0 °C to 85 °C (commercial)
Speed Grade -8 (slowest, most timing margin) C8
VCCIO Options 1.8 V / 2.5 V / 3.3 V —
Process 0.15 µm all-layer copper metal —
PCI Compliance PCI Local Bus Rev 2.2 at 33/66 MHz, 32/64-bit —
Memory Interface Support DDR SDRAM, ZBT SRAM, QDR SRAM, LVDS —
Configuration Enhanced (EPC) bitstream —
Device Type — Loadable PLD / FPGA
System Gates — 600,000
Embedded Memory — 311,296 bits
User I/O Pins — 488
Dedicated Inputs — 4
Outputs — 480
Propagation Delay (typ.) — 1.48 ns
Pin-to-Pin Timing — 1.78 ns
Internal Frequency (typ.) — 301.21 MHz
Core Supply Voltage — 1.8 V nominal (1.71 V to 1.89 V)
Process Technology — 0.18 µm all-layer copper-metal
Architecture — MultiCore LUT + Embedded System Blocks (ESB)
Pin-Compatible With — APEX 20KE family
RoHS 狀態 — unknown

資料表與資源

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