EP20K600CB652C7 vs EP20K600CB652C7E5 比較
詳細並排比較 EP20K600CB652C7 由 Altera 與 EP20K600CB652C7E5 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K600CB652C7 | EP20K600CB652C7E5 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Series | APEX 20K | — |
| Family | APEX 20KC | APEX 20KC |
| System Gates | 600,000 | — |
| Logic Elements | 24,320 | — |
| Embedded RAM | 311,296 bits | — |
| User I/O Count | 488 | — |
| 封裝 | 652-ball BGA | 652-ball FineLine BGA |
| Process Technology | 0.15 µm CMOS (all-layer copper interconnect) | 0.15 um CMOS |
| Core Voltage | 1.8 V | 1.8 V |
| I/O Voltage Support | 1.8V / 2.5V / 3.3V / 5V (MultiVolt) | — |
| Maximum Frequency | 375.94 MHz | — |
| Architecture | MultiCore (LUT + embedded memory) | — |
| 工作溫度 | Commercial (0C to +70C) | 0C to +85C (commercial, suffix C7) |
| Speed Grade | C7 | 7 (-1 speed bin equivalent, E5 suffix) |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance status] |
| Typical Gate Count | — | 600K gates |
| Logic Elements / Macros | — | 24,320 |
| Maximum User I/O | — | 488 |
| Embedded Memory (EAB bits) | — | 311,296 bits |
| PLL Count | — | 4 |
| Supported I/O Standards | — | LVTTL, LVCMOS, PCI, SSTL, HSTL |
| Configuration Scheme | — | Passive Serial / JTAG / EPC16 / EPC8 |
| 生命週期狀態 | — | Obsolete - last time buy has passed |