EP20K600CB652C8N vs EP20K600CB672C8 比較

詳細並排比較 EP20K600CB652C8N 由 Altera 與 EP20K600CB672C8 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K600CB652C8N EP20K600CB672C8
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family APEX 20KC APEX-20KC®
Device Type Loadable PLD / FPGA —
System Gates 600,000 —
Logic Elements 24,320 cells —
Embedded Memory 311,296 bits —
User I/O Pins 488 —
Dedicated Inputs 4 —
Outputs 480 —
Propagation Delay (typ.) 1.48 ns —
Pin-to-Pin Timing 1.78 ns —
Internal Frequency (typ.) 301.21 MHz —
Core Supply Voltage 1.8 V nominal (1.71 V to 1.89 V) —
Process Technology 0.18 µm all-layer copper-metal 0.15 µm CMOS
Speed Grade C8 C8 (approx. 301 MHz internal)
工作溫度 0 °C to 85 °C (commercial) 0 °C to +85 °C (commercial)
封裝 652-ball LBGA, 45 x 45 mm, 1.27 mm pitch —
安裝類型 Surface Mount (BGA) Surface Mount
Architecture MultiCore LUT + Embedded System Blocks (ESB) —
Pin-Compatible With APEX 20KE family —
RoHS 狀態 unknown Unknown (legacy part, pre-RoHS era)
Series — APEX 20KC
Number of Logic Elements/Cells — 24320
Total RAM Bits — 311296
Number of I/O — 508
Number of Gates — 600000
Voltage - Supply — 1.71 V to 1.89 V (core); 3.0 V to 3.6 V (I/O)
封裝 / 外殼 — 672-BBGA, FCBGA (27 x 27 mm)
Supplier Device Package — 672-FBGA (27 x 27)
PLLs — 4
I/O Standards — LVTTL, LVCMOS, SSTL, HSTL, GTL+, PCI 3.3 V
Lead Free — Unknown

資料表與資源

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