EP20K600CB652I7N vs EP20K600CB652I9N 比較
詳細並排比較 EP20K600CB652I7N 由 Altera 與 EP20K600CB652I9N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP20K600CB652I9N - 600K APEX 20KC FPGA, 652-BGA, Industrial | Altera
EP20K600CB652I9N Obsolete規格比較
| 參數 | EP20K600CB652I7N | EP20K600CB652I9N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX 20KC | APEX 20KC |
| Typical Gates | 600,000 | — |
| Logic Elements (Cells) | 24,320 | — |
| Maximum Operating Frequency | 375.94 MHz | 250 MHz |
| Process Technology | 0.15 µm CMOS | 0.15 um CMOS |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| 封裝 | 652-pin FineLine BGA | 652-BGA (PBGA652) |
| 安裝類型 | Surface Mount (BGA) | — |
| User I/O Banks | [DATA_NEEDED: User I/O Banks] | — |
| Maximum User I/O | [DATA_NEEDED: Maximum User I/O] | — |
| Embedded System Block (ESB) Memory | 311,040 bits | — |
| Phase-Locked Loops (PLLs) | 4 | — |
| Operating Temperature Grade | Industrial (-40C to +100C) | — |
| Speed Grade | 7 | — |
| Configuration Method | SRAM-based, JTAG (IEEE 1149.1) | Passive Serial / Passive Parallel / JTAG |
| RoHS 狀態 | unknown | — |
| Logic Elements | — | 24,320 |
| System Gates | — | 600,000 |
| Core Voltage | — | 1.8 V |
| I/O Voltage | — | 3.3 V |
| Total I/O Pins | — | 488 |
| General-Purpose I/O | — | 480 |
| Dedicated Inputs | — | 4 |
| Terminal Pitch | — | 1.27 mm |
| 工作溫度 | — | -40C to +100C (Industrial) |
| Embedded Memory | — | ESB (Embedded System Block) RAM / CAM |
| I/O Standards | — | LVDS, PCI, LVTTL, LVCMOS |