EP20K600CB652I9N vs EP20K600CB652C9N 比較
詳細並排比較 EP20K600CB652I9N 由 Altera 與 EP20K600CB652C9N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP20K600CB652I9N - 600K APEX 20KC FPGA, 652-BGA, Industrial | Altera
EP20K600CB652I9N Obsolete規格比較
| 參數 | EP20K600CB652I9N | EP20K600CB652C9N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX 20KC | APEX 20KC |
| Logic Elements | 24,320 | 24,320 |
| System Gates | 600,000 | — |
| Maximum Operating Frequency | 250 MHz | — |
| Process Technology | 0.15 um CMOS | 0.15 micron all-layer copper CMOS |
| Core Voltage | 1.8 V | — |
| I/O Voltage | 3.3 V | — |
| Total I/O Pins | 488 | — |
| General-Purpose I/O | 480 | — |
| Dedicated Inputs | 4 | — |
| 封裝 | 652-BGA (PBGA652) | BGA-652 (652-ball FineLine BGA, 45 x 45 mm, 1.27 mm pitch) |
| Terminal Pitch | 1.27 mm | — |
| 工作溫度 | -40C to +100C (Industrial) | 0 C to 85 C (commercial) |
| Configuration Method | Passive Serial / Passive Parallel / JTAG | — |
| Embedded Memory | ESB (Embedded System Block) RAM / CAM | — |
| I/O Standards | LVDS, PCI, LVTTL, LVCMOS | — |
| Device Type | — | Loadable PLD (FPGA) |
| Typical Gates | — | 600,000 |
| Maximum User I/O | — | 488 |
| Core Supply Voltage | — | 1.8 V |
| Speed Grade | — | C9 (~1.48 ns propagation delay) |
| Architecture | — | MultiCore LUT + embedded system memory (ESB) |
| On-chip Memory | — | Embedded system memory blocks (dual-port RAM, FIFO) |
| Configuration Interface | — | JTAG (IEEE 1149.1) and serial/PROM configuration |
| 安裝類型 | — | Surface Mount (BGA) |
| Pin/Pin Compatibility | — | Pin-compatible with APEX 20KE devices of same package |
| Toolchain | — | Altera/Intel Quartus II (legacy APEX support) |
| RoHS 狀態 | — | [DATA_NEEDED: rohs status] |
| MSL 等級 | — | [DATA_NEEDED: MSL level] |