EP20K600CB672C7 vs EP20K600CF672C7 比較
詳細並排比較 EP20K600CB672C7 由 Altera 與 EP20K600CF672C7 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K600CB672C7 | EP20K600CF672C7 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX 20KC | APEX-20KC |
| Device Type | FPGA / Programmable Logic Device (PLD) | SPLD / FPGA |
| Typical Gates | 600,000 | — |
| Maximum System Gates | 1,053,840 | — |
| Logic Elements | 30,960 (typical) | — |
| Embedded Memory | 311 kbits (EAB-based) | Dual-port RAM via ESBs |
| User I/Os | 488 | — |
| 封裝 | 672-ball FineLine BGA (45 x 45 mm, 1.27 mm pitch) | 672-ball FC-FBGA (27x27 mm) |
| Speed Grade | C7 (commercial, 0 °C to 85 °C) | C7 |
| Propagation Delay | 1.48 ns | — |
| Process Technology | 0.15 µm all-layer copper-metal CMOS | 0.15 um CMOS, all-layer copper |
| Core Voltage | 2.5 V | — |
| I/O Voltage Support | 1.8 V, 2.5 V, 3.3 V (MultiVolt I/O) | — |
| Number of PLLs | 4 | — |
| Dual-Port RAM | Yes (4.5 ns access) | — |
| Supported I/O Standards | LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, AGP, HSTL, CTT | — |
| 工作溫度 | 0 °C to 85 °C (commercial) | 0C to 85C (commercial) |
| Configuration Method | EPC configuration devices / JTAG / passive serial | — |
| RoHS 狀態 | Compliant | Compliant |
| System Gates | — | 600,000 |
| Logic Cells | — | 24,320 |
| User I/O | — | 508 |
| Ball Pitch | — | 1.27 mm |
| Core Voltage (VCCINT) | — | 1.71 V to 1.89 V |
| Propagation Delay (typ.) | — | 1.48 ns |
| CAM Support | — | Yes (ESB-based content-addressable memory) |
| 安裝類型 | — | Surface Mount |