EP20K600CB672C8 vs EP20K600CB672C8N 比較
詳細並排比較 EP20K600CB672C8 由 Intel 與 EP20K600CB672C8N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EP20K600CB672C8 - APEX 20KC FPGA 600K Gates 672-FBGA | Intel / Altera
EP20K600CB672C8 Obsolete規格比較
| 參數 | EP20K600CB672C8 | EP20K600CB672C8N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Series | APEX 20KC | — |
| Family | APEX-20KC® | APEX-20KC |
| Number of Logic Elements/Cells | 24320 | — |
| Total RAM Bits | 311296 | — |
| Number of I/O | 508 | — |
| Number of Gates | 600000 | — |
| Voltage - Supply | 1.71 V to 1.89 V (core); 3.0 V to 3.6 V (I/O) | — |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| 工作溫度 | 0 °C to +85 °C (commercial) | Commercial (0C to +85C) |
| 封裝 / 外殼 | 672-BBGA, FCBGA (27 x 27 mm) | — |
| Supplier Device Package | 672-FBGA (27 x 27) | — |
| Speed Grade | C8 (approx. 301 MHz internal) | C8 |
| Process Technology | 0.15 µm CMOS | 0.18 µm CMOS |
| PLLs | 4 | On-chip with clock-doubling and phase-shift |
| I/O Standards | LVTTL, LVCMOS, SSTL, HSTL, GTL+, PCI 3.3 V | — |
| RoHS 狀態 | Unknown (legacy part, pre-RoHS era) | [DATA_NEEDED: RoHS status] |
| Lead Free | Unknown | — |
| Logic Elements (LEs) | — | 24,320 |
| Embedded Memory Bits | — | 311,296 |
| Maximum User I/O | — | 508 |
| 封裝 | — | 672-BBGA (FineLine BGA) |
| Configuration Memory | — | SRAM, in-system programmable |
| Configuration Schemes | — | Passive Serial / Active Serial / JTAG (IEEE 1149.1) |
| Core Voltage (VCCINT) | — | 2.5 V |
| I/O Voltage (VCCIO) | — | 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| PCI Support | — | PCI-SIG compliant 3.3 V, 33/66 MHz, 32/64-bit |
| External Memory Interface | — | DDR SDRAM, ZBT SRAM |
| Dedicated Clock Inputs | — | 16 |
| LVDS Channels | — | Up to 32 |