EP20K600CF33C7 vs EP20K600CF33C8 比較

詳細並排比較 EP20K600CF33C7 由 Altera 與 EP20K600CF33C8 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K600CF33C7 EP20K600CF33C8
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete NRND
Series APEX-20K —
Family APEX-20K Field Programmable Gate Array APEX 20KC
Typical Gate Count 600,000 gates —
Logic Elements 24,320 24,320
Embedded RAM Bits 311,296 bits 311,296
Embedded Array Blocks (EABs) [DATA_NEEDED: EAB count] —
Maximum User I/O Pins [DATA_NEEDED: max user I/O] —
Core Supply Voltage (VCCINT) 1.71 V to 1.89 V —
I/O Supply Voltage (VCCIO) [DATA_NEEDED: VCCIO range] —
工作溫度範圍 -40C to +85C (Industrial) —
封裝 1020-BBGA / FCBGA (33x33 mm) 1020-ball FineLine BGA (FC-FBGA), 33 x 33 mm
Package Code BGA, 1020 balls —
Speed Grade C7 (7 ns) -8
Terminal Form Ball —
RoHS 狀態 [DATA_NEEDED: RoHS status] Compliant (lead-free version) / non-compliant for legacy C-speed grade variant
安裝類型 Surface Mount —
MSL 等級 [DATA_NEEDED: MSL level] —
Configuration Memory SRAM (volatile, requires external config device) —
Device Type — FPGA (Field Programmable Gate Array)
Typical Gates — 600,000
Embedded System Blocks (ESB) — 152
Maximum User I/O — 488
Process Technology — 0.15 µm CMOS
Core Voltage (VCCINT) — 1.8 V
I/O Voltage (VCCIO) — 1.8 V / 2.5 V / 3.3 V (bank-selectable)
LVDS Support — Yes, up to 840 Mbps
PLLs — 4 enhanced PLLs
工作溫度 — Commercial (0 °C to +85 °C)
Configuration Modes — Passive Serial, Passive Parallel Asynchronous, Passive Parallel Synchronous, JTAG
Status — NRND / Last-Time-Buy (per Altera/Intel product notice)

資料表與資源

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