EP20K600CF33C8N vs EP20K600CF33C7 比較
詳細並排比較 EP20K600CF33C8N 由 Intel 與 EP20K600CF33C7 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K600CF33C8N | EP20K600CF33C7 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX 20KC | APEX-20K Field Programmable Gate Array |
| Logic Elements / Cells | 24,320 | — |
| Total RAM Bits | 311,296 | — |
| Number of LABs / CLBs | 2,432 | — |
| Number of Gates | 1,537,000 (max) | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Core Voltage Supply | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Technology / Process | 0.15 µm CMOS | — |
| Maximum Internal Frequency | 301.21 MHz | — |
| Speed Grade | -8 (slower than -7) | C7 (7 ns) |
| 工作溫度 | 0°C to 85°C (TJ) | — |
| 封裝 | 1020-pin FC-FBGA (flip-chip) | 1020-BBGA / FCBGA (33x33 mm) |
| Pitch | 0.33 mm | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Programmable Type | In-System / SRAM-based | — |
| Configuration Interface | JTAG (IEEE 1149.1) + Passive Serial / Parallel | — |
| RoHS 狀態 | Compliant (N suffix) | [DATA_NEEDED: RoHS status] |
| Series | — | APEX-20K |
| Typical Gate Count | — | 600,000 gates |
| Logic Elements | — | 24,320 |
| Embedded RAM Bits | — | 311,296 bits |
| Embedded Array Blocks (EABs) | — | [DATA_NEEDED: EAB count] |
| Maximum User I/O Pins | — | [DATA_NEEDED: max user I/O] |
| Core Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V |
| I/O Supply Voltage (VCCIO) | — | [DATA_NEEDED: VCCIO range] |
| 工作溫度範圍 | — | -40C to +85C (Industrial) |
| Package Code | — | BGA, 1020 balls |
| Terminal Form | — | Ball |
| MSL 等級 | — | [DATA_NEEDED: MSL level] |
| Configuration Memory | — | SRAM (volatile, requires external config device) |