EP20K600CF672C-8 vs EP20K600CB672C8N 比較
詳細並排比較 EP20K600CF672C-8 由 Altera 與 EP20K600CB672C8N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP20K600CF672C-8 - APEX 20KC FPGA 600K Gates 24320 LEs 672-BGA | Intel / Altera
EP20K600CF672C-8 Obsolete規格比較
| 參數 | EP20K600CF672C-8 | EP20K600CB672C8N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Series | APEX 20KC | — |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Typical Gates | 600,000 | — |
| Logic Elements (LEs) | 24,320 | 24,320 |
| Embedded Memory Bits | 311,296 | 311,296 |
| Maximum User I/Os | 508 | — |
| 腳位數 | 672 | — |
| Package Type | 672-BGA (FineLine BGA, 1.27 mm pitch, 45 x 45 mm) | — |
| Speed Grade | -8 | C8 |
| Propagation Delay (tPD) | 1.48 ns | — |
| Process Technology | 0.15 micrometer all-layer copper-metal | 0.18 µm CMOS |
| Architecture | MultiCore (LUT logic + embedded memory) | — |
| 工作溫度範圍 | 0C to +85C (commercial) | — |
| 供應電壓 | Multi-rail (core + I/O banks) | — |
| Configuration Method | Serial / parallel / JTAG | — |
| Pin Compatibility | Pin-compatible with APEX 20KE family | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Family | — | APEX-20KC |
| Maximum User I/O | — | 508 |
| 封裝 | — | 672-BBGA (FineLine BGA) |
| Configuration Memory | — | SRAM, in-system programmable |
| Configuration Schemes | — | Passive Serial / Active Serial / JTAG (IEEE 1149.1) |
| Core Voltage (VCCINT) | — | 2.5 V |
| I/O Voltage (VCCIO) | — | 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| 工作溫度 | — | Commercial (0C to +85C) |
| PCI Support | — | PCI-SIG compliant 3.3 V, 33/66 MHz, 32/64-bit |
| External Memory Interface | — | DDR SDRAM, ZBT SRAM |
| Dedicated Clock Inputs | — | 16 |
| PLLs | — | On-chip with clock-doubling and phase-shift |
| LVDS Channels | — | Up to 32 |
| 安裝類型 | — | Surface Mount (BGA) |