EP20K600CF672C7ES vs EP20K600CEF672C7 比較

詳細並排比較 EP20K600CF672C7ES 由 Altera 與 EP20K600CEF672C7 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP20K600CF672C7ES EP20K600CF672C7ES - APEX 20KC FPGA 600K Gates 672-FBGA | Altera

EP20K600CF672C7ES - APEX 20KC FPGA 600K Gates 672-FBGA | Altera

EP20K600CF672C7ES ⚠ 最後購買機會

規格比較

參數 EP20K600CF672C7ES EP20K600CEF672C7
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 最後購買 Obsolete
Series APEX 20KC APEX 20KC
Family APEX 20K APEX 20KC (Enhanced Configuration)
Logic Elements / Cells 24320 24,320
System Gates 600000 —
Maximum User I/O 504 —
Maximum Input Lines 508 —
Number of Macrocells 504 —
Maximum Operating Frequency 375.94 MHz (per FPGAkey listing) 375.94 MHz
Propagation Delay 1.6 ns 1.48 ns (typ)
Internal Reference Clock 1666.6 MHz —
Process Technology 0.15 µm CMOS 0.15 µm CMOS, all-layer copper
Core Supply Voltage (VCCINT) 1.8 V —
Package Type FC-FBGA —
Pin / Ball Count 672 —
Grade Suffix ES (engineering sample / extended screening) —
工作溫度 [DATA_NEEDED: operating temperature grade] 0 °C to +85 °C (commercial)
安裝類型 Surface Mount (BGA) —
MSL 等級 [DATA_NEEDED: MSL rating] —
RoHS 狀態 [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status]
Configuration Memory SRAM-based (volatile) —
Manufacturer — Intel (formerly Altera)
Device Type — FPGA / Loadable PLD
Gate Count (typical) — 600,000 gates
User I/Os — 488
Core Supply Voltage — 1.8 V
封裝 — 672-ball FineLine BGA (FC-FBGA)
Package Code — BGA-652, 45 x 45 mm, 1.27 mm pitch
Configuration — SRAM-based, serial or parallel (EPC)
Embedded Memory — EAB blocks (dual-port RAM with byte enables)
LVDS Support — True-LVDS channels integrated
MultiVolt I/O — 1.8 V, 2.5 V, 3.3 V interfaces
External Memory Interface — DDR SDRAM, QDR SRAM
JTAG Support — IEEE 1149.1 boundary-scan

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