EP20K600CF672I9N vs EP20K600CF672I8N 比較
詳細並排比較 EP20K600CF672I9N 由 Intel 與 EP20K600CF672I8N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K600CF672I9N | EP20K600CF672I8N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | APEX 20KC | — |
| Logic Elements | 24,320 cells | — |
| Typical Gates | 600,000 | — |
| Maximum Frequency | 250 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15-um all-layer copper-metal |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | [DATA_NEEDED: VCCIO range] | — |
| Embedded Memory | 311,040 bits (approx. 38 KB) | — |
| 封裝 | 672-ball FC-FBGA | — |
| PLL Count | [DATA_NEEDED: PLL count] | — |
| User I/O Pins | [DATA_NEEDED: max user I/O] | — |
| Configuration Mode | JTAG / Serial / Parallel | — |
| Programming Interface | IEEE 1149.1 JTAG | — |
| 工作溫度 | -40 °C to +85 °C (industrial) | 0C to 85C (Industrial) |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Device Family | — | APEX 20KC |
| Device Type | — | SPLD / PLD (FPGA-class) |
| System Gates | — | 600K |
| Logic Elements / Cells | — | 24,320 |
| Maximum User I/O (digchip) | — | 488 |
| Maximum User I/O (Altera) | — | 508 |
| Total Package Pins | — | 672 |
| Package Type | — | FC-FBGA (Fine-pitch Chip-Scale BGA), 45 x 45 mm, 1.27 mm pitch |
| Internal Performance | — | 301.21 MHz |
| Propagation Delay | — | 1.48 ns |
| Core Supply Voltage | — | 1.8 V |
| Pin-Compatible With | — | APEX 20KE family |