EP20K600EBI652-2X vs EP20K600CB652C9N 比較
詳細並排比較 EP20K600EBI652-2X 由 Intel 與 EP20K600CB652C9N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EP20K600EBI652-2X - 600K Gate APEX 20KE FPGA 488 I/O BGA-652 | Intel
EP20K600EBI652-2X Obsolete規格比較
| 參數 | EP20K600EBI652-2X | EP20K600CB652C9N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX 20KE | APEX 20KC |
| Logic Elements | 24,320 cells | 24,320 |
| Maximum Gates | 600,000 gates | — |
| User I/Os | 488 | — |
| Embedded RAM | 311 Kbits | — |
| Dedicated Inputs | 4 | — |
| 封裝 | 652-ball BGA (45 x 45 mm, 1.27 mm pitch, thermally enhanced) | BGA-652 (652-ball FineLine BGA, 45 x 45 mm, 1.27 mm pitch) |
| Maximum Operating Frequency | 200 MHz | — |
| Propagation Delay | 1.48 ns | — |
| Core Voltage | 1.8 V | — |
| Process Technology | 0.18 µm all-layer copper CMOS | 0.15 micron all-layer copper CMOS |
| 工作溫度 | 0 C to 85 C (commercial) | 0 C to 85 C (commercial) |
| Speed Grade | -2X (mid-tier) | C9 (~1.48 ns propagation delay) |
| PLLs | 4 | — |
| MultiVolt I/O Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Configuration Method | Serial/parallel EPROM, JTAG, controller | — |
| RoHS 狀態 | Lead-free / RoHS compliant | [DATA_NEEDED: rohs status] |
| Device Type | — | Loadable PLD (FPGA) |
| Typical Gates | — | 600,000 |
| Maximum User I/O | — | 488 |
| Core Supply Voltage | — | 1.8 V |
| Architecture | — | MultiCore LUT + embedded system memory (ESB) |
| On-chip Memory | — | Embedded system memory blocks (dual-port RAM, FIFO) |
| Configuration Interface | — | JTAG (IEEE 1149.1) and serial/PROM configuration |
| 安裝類型 | — | Surface Mount (BGA) |
| Pin/Pin Compatibility | — | Pin-compatible with APEX 20KE devices of same package |
| Toolchain | — | Altera/Intel Quartus II (legacy APEX support) |
| MSL 等級 | — | [DATA_NEEDED: MSL level] |