EP2A25F672I8N vs EP2A25F672I8 比較
詳細並排比較 EP2A25F672I8N 由 Intel 與 EP2A25F672I8 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2A25F672I8N | EP2A25F672I8 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Family | APEX II | APEX II |
| Device | EP2A25 | — |
| Logic Elements | 24,320 | — |
| Gates | 900,000 | — |
| Embedded Memory (bits) | 622,592 | — |
| User I/Os | 492 | 492 |
| 封裝 | 672-ball FC-FBGA (FineLine BGA) | 672-ball FC-FBGA (FineLine BGA), 27 × 27 mm, 1 mm pitch |
| Package Size | 27 x 27 mm | — |
| Ball Pitch | 1 mm | — |
| Process Technology | 0.15 µm all-layer copper-metal | 0.15 µm CMOS, up to 8 metal layers |
| Metal Layers | Up to 8 | — |
| Core Voltage (VCCINT) | 1.5 V | — |
| Internal Frequency (max) | 333 MHz | — |
| Propagation Delay | 1.69 ns | 1.69 ns (typical) |
| 工作溫度 | 0 °C to 85 °C | –40 °C to +85 °C (industrial, 'I' grade) |
| Logic Family | CMOS | — |
| I/O Standards Supported | True-LVDS, LVPECL, PCML, HyperTransport | LVTTL, LVCMOS, SSTL, HSTL, LVDS, LVPECL, GTL+, PCI |
| Configuration Method | SRAM-based (Altera Quartus II) | — |
| RoHS 狀態 | unknown | unknown |
| Lead-Free | unknown | — |
| Logic Elements / Cells | — | 24,320 |
| Equivalent Gates | — | 900,000 |
| Embedded Memory (RAM bits) | — | 622,592 |
| Number of PLLs | — | 4 |
| Core Supply Voltage | — | 1.5 V |
| Internal Performance | — | 333 MHz (per legacy datasheet) |
| LVDS / High-Speed I/O | — | Yes, up to 1 Gbps |
| 安裝類型 | — | Surface Mount (BGA) |
| Speed Grade | — | I8 (industrial, 8-speed-grade per APEX II ordering scheme) |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |
| Lead-Free Status | — | unknown |