EP2A25F672I9N vs EP2A25F672C9N 比較

詳細並排比較 EP2A25F672I9N 由 Intel 與 EP2A25F672C9N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP2A25F672I9N EP2A25F672C9N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Series APEX II (EP2A25) —
Family APEX II APEX II
Device Type FPGA (Field-Programmable Gate Array) —
Logic Elements / Cells 24,320 24320
System Gates 900,000 (typical) Approx. 900000
Process Technology 0.15 µm CMOS 0.15 µm all-layer copper, up to 8 metal layers
Maximum Internal Frequency 236 MHz —
Propagation Delay (tpd) 2.23 ns —
Core Supply Voltage (VCCINT) 1.5 V nominal (1.425 V to 1.525 V) 1.425 V to 1.575 V (nominal 1.5 V)
I/O Supply Voltage [DATA_NEEDED: VCCIO range] —
封裝 672-pin FC-FBGA 672-ball FineLine BGA (F672), 27 × 27 mm, 1.00 mm pitch
安裝類型 Surface Mount Surface Mount (BGA)
工作溫度 -40 °C to +85 °C (Industrial, 'I' suffix) 0 °C to +85 °C (commercial, C9 grade)
Speed Grade 9 (fastest commercial APEX II) —
Embedded System Blocks (ESB) Yes (on-chip RAM/ROM) —
PLLs 4 —
Configuration JTAG / in-system programmable —
RoHS 狀態 [DATA_NEEDED: confirmed] Compliant (per distributor listings)
MSL 等級 [DATA_NEEDED] —
AEC-Q100 not_applicable —
Maximum User I/O — 492
Operating Frequency — 236 MHz
Seated Height (max) — 2.100 mm
Propagation Delay — 2.23 ns
Logic Family — CMOS
I/O Standards Supported — LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, LVDS, LVPECL, PCML, HyperTransport
LVDS Data Rate — Up to 1 Gbps (True-LVDS)
Configuration Interface — Serial / Parallel PROM, JTAG, passive parallel (enhanced)
Embedded Memory — Enhanced System Blocks (ESBs) for dual-port RAM
Design Software — Quartus II (v5.1 or later)

資料表與資源

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