EP2A25F724 vs EP2A25F6T218 比較

詳細並排比較 EP2A25F724 由 Altera 與 EP2A25F6T218 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP2A25F724 EP2A25F6T218
品牌 Altera Altera
類別 Memory ICs FPGA & CPLD
生命週期狀態 NRND Obsolete
Device Type Enhanced Configuration Device (EPC) —
Target FPGA Family Altera APEX II (EP2A-series) —
Memory Technology Flash (non-volatile, no battery required) —
Configuration Modes Passive Serial, Passive Parallel Async, Passive Parallel Sync —
封裝 724-ball FineLine BGA 218-ball FineLine BGA
JTAG Support IEEE Std. 1149.1 (boundary-scan / ISP) —
Multi-Device Configuration Yes - supports daisy-chained APEX II FPGAs —
In-System Programmability Yes (via JTAG) —
工作溫度 [DATA_NEEDED: operating temperature grade] -40C to +85C (TJ)
供應電壓 [DATA_NEEDED: VCC nominal] —
On-chip Oscillator Yes (internal configuration clock) —
User Flash Region Yes (separate from configuration data) —
安裝類型 Surface Mount (BGA) Surface Mount
RoHS 狀態 Compliant [DATA_NEEDED: RoHS status]
生命週期狀態 Not Recommended for New Designs (NRND) - Altera acquired by Intel 2015 —
Series — APEX II
Family — APEX II FPGA
Logic Elements — ~25,000
Speed Grade — -1
Process Technology — 0.15 um all-layer copper, up to 8 metal layers
High-Speed Interface — 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport
Embedded Memory — ESB-based dual-port RAM / FIFO / CAM
Configuration — SRAM-based, JTAG-supported
MultiCore / Hot-Socket — Supported
Boundary Scan — JTAG IEEE 1149.1
Lead-Free — [DATA_NEEDED: lead-free status]

資料表與資源

瀏覽所有產品 建立 BOM 索取報價