EP2A40B724C9N vs EP2A40B724CP 比較
詳細並排比較 EP2A40B724C9N 由 Altera 與 EP2A40B724CP 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2A40B724C9N | EP2A40B724CP |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX II | APEX II |
| Series | EP2A40 | — |
| Device Type | FPGA (Field-Programmable Gate Array) | FPGA (SRAM-based) |
| System Gates | 1,500,000 | — |
| Logic Elements / Cells | 38,400 | — |
| Maximum Frequency | 366 MHz | — |
| Propagation Delay | 2.05 ns | — |
| Process Technology | 0.15 µm CMOS | — |
| Core Supply Voltage | 1.5 V | — |
| User I/O Count | 536 | — |
| 封裝 | 724-ball FCBGA (Fine-pitch Chip-Scale BGA) | 724-ball FineLine BGA (FBGA) |
| Terminal Pitch | 1.270 mm | — |
| Number of Terminals | 724 | — |
| Terminal Form | Ball | — |
| Output Function | Macrocells | — |
| Operating Temperature Grade | Industrial (OTHER / per datasheet) | — |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| Logic Elements | — | 40,000 |
| Embedded Memory Bits | — | 655,360 bits |
| LAB/IO Rows | — | 540 |
| Effective Logic Capacity | — | 38400 LE |
| Core Voltage | — | 1.5 V |
| I/O Standards | — | LVTTL, LVCMOS, LVDS, PCI, HSTL, LVPECL |
| Configuration | — | SRAM-based, JTAG, in-system programmable |
| PLL Count | — | [DATA_NEEDED: PLL count] |
| Embedded Multipliers | — | [DATA_NEEDED: multiplier count] |
| 工作溫度 | — | 0C to +85C (commercial) |
| RoHS 狀態 | — | [DATA_NEEDED: RoHS status] |
| MSL 等級 | — | [DATA_NEEDED: MSL level] |