EP2A40F1020C6 vs EP2A40F1020C9ES 比較
詳細並排比較 EP2A40F1020C6 由 Intel 與 EP2A40F1020C9ES 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP2A40F1020C9ES - APEX II FPGA 1.5M Gates 38400 Cells 366MHz | Altera
EP2A40F1020C9ES Obsolete規格比較
| 參數 | EP2A40F1020C6 | EP2A40F1020C9ES |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX II | APEX II |
| Maximum System Gates | 1,600,000 | — |
| Typical Gates | 40,000 | — |
| Logic Elements | [DATA_NEEDED: exact LE count] | — |
| Embedded System Bits | 655,360 bits | — |
| Maximum User I/O Pins | [DATA_NEEDED: max user I/O] | — |
| Number of PLLs | 4 | — |
| Core Supply Voltage | 1.8 V | 1.5 V |
| MultiVolt I/O Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V | — |
| 封裝 | FBGA-1020 | 1020-pin FC-FBGA |
| Process Technology | 0.15 µm CMOS | 0.15 µm CMOS |
| Configuration Interface | Passive Serial, Passive Parallel, Passive Asynchronous, JTAG (IEEE 1149.1) | — |
| In-System Programmability | Yes | — |
| Operating Temperature Grade | Commercial (0C to +85C) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| System Gates | — | 1.5 M |
| Logic Cells / Elements | — | 38,400 |
| Maximum Internal Clock Frequency | — | 366 MHz |
| Package Type | — | Flip-Chip Fine-Pitch Ball Grid Array |
| 安裝類型 | — | Surface Mount |
| Embedded Memory | — | Embedded System Blocks (ESBs) - RAM/ROM |
| I/O Standards | — | LVDS and other high-speed standards (per family datasheet) |
| RAM Support | — | Synchronous and asynchronous |
| 工作溫度 | — | [DATA_NEEDED: operating temperature grade] |