EP2A40F1020C7N vs EP2A40F1020I8N 比較

詳細並排比較 EP2A40F1020C7N 由 Intel 與 EP2A40F1020I8N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP2A40F1020C7N EP2A40F1020I8N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family APEX II APEX II (EP2A40)
Technology 0.15 µm all-layer copper CMOS, up to 8 metal layers —
System Gates 1,500,000 (1.5 M) 1.5 M (typical)
Logic Elements 38,400 38,400 cells
Embedded Memory ESB-based, 504 Kbits total —
Maximum Internal Performance 562 MHz —
Propagation Delay 1.55 ns —
User I/O Pins 735 —
PLLs 4 —
Clock Networks 12 —
True-LVDS Data Rate 1 Gbps —
Supported I/O Standards True-LVDS, LVPECL, PCML, HyperTransport, LVTTL, LVCMOS, PCI, SSTL —
Core Supply Voltage 1.5 V nominal (1.425 V – 1.575 V) —
Logic Family CMOS —
封裝 FC-FBGA-1020, 33 × 33 mm, 1.0 mm pitch, fine-line 1020-pin FC-FBGA (Flip-Chip Fine-pitch BGA)
工作溫度 0 °C to +85 °C (commercial, C7 grade) —
Terminal Form BGA ball (flip-chip) —
安裝類型 Surface Mount Surface Mount (BGA)
Process Technology — 0.15 um CMOS
Core Voltage — 1.5 V
Maximum Internal Frequency — 376 MHz
User I/O Count — 735 (maximum)
Operating Temperature Grade — Industrial (-40 C to +100 C) / 'I' suffix
Speed Grade — 8
Architecture — LUT-based with embedded system blocks (ESBs)
Configuration — SRAM-based, JTAG / passive serial / passive parallel
RoHS 狀態 — [DATA_NEEDED: RoHS status]
Lead-Free — [DATA_NEEDED: lead-free status]
Number of PLLs — [DATA_NEEDED: PLL count]
Total Embedded Memory — [DATA_NEEDED: embedded memory bits]

資料表與資源

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