EP2A40F672C7ES vs EP2A40F672C9 比較
詳細並排比較 EP2A40F672C7ES 由 Intel 與 EP2A40F672C9 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2A40F672C7ES | EP2A40F672C9 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 最後購買 |
| Family | APEX II | APEX II |
| Logic Elements | 38400 | — |
| Typical Gates | 1.5 M | — |
| Maximum Logic Elements | 40960 | — |
| Maximum Macro Cells | 2560 | — |
| Maximum User I/O | 492 | — |
| Maximum Operating Frequency | 562 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm all-layer copper, up to 8 metal layers |
| Core Voltage (VCCINT) | 1.5 V | — |
| I/O Voltage (VCCIO) | 3.3 V | — |
| 封裝 | 672-pin FC-FBGA (FineLine BGA) | 672-BBGA, FC-FBGA (FineLine) |
| Package Dimensions | 27 × 27 mm | — |
| Ball Pitch | 1.0 mm | — |
| Speed Grade | 7 | — |
| 工作溫度 | 0 °C to +85 °C (commercial) | 0 °C to 85 °C (commercial) |
| Status Code | ES (Engineering Sample) | — |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status] |
| Device Family | — | APEX II PLD |
| Logic Elements / Cells | — | 38,400 |
| System Gates | — | 1.5 M |
| Macros | — | 2,560 |
| User I/Os | — | 492 |
| 腳位數 | — | 672 |
| Package Size | — | 27 mm × 27 mm, 1 mm ball pitch |
| Core Voltage | — | 1.5 V |
| Logic Family | — | CMOS |
| Propagation Delay | — | 1.55 ns |
| Internal Speed Grade | — | 366 MHz |
| I/O Standards Supported | — | True-LVDS, LVPECL, PCML, HyperTransport |