EP2A40F672I8 vs EP20K600CF672I8 比較

詳細並排比較 EP2A40F672I8 由 Altera 與 EP20K600CF672I8 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP2A40F672I8 EP20K600CF672I8
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family APEX II (EP2A) APEX 20KC
Logic Elements 38,400 cells —
System Gates 1,500,000 —
Maximum Operating Frequency 376 MHz —
Process Technology 0.15 um 0.15 µm all-layer copper
Core Supply Voltage (VCCINT) 1.5 V —
封裝 672-ball FC-FBGA (Fine-pitch Chip-Scale BGA) —
User I/O Count Up to 497 (per APEX II data book) —
Speed Grade I8 (industrial temperature, mid performance) —
工作溫度 -40C to +100C (industrial) 0 °C to +85 °C (Industrial)
安裝類型 Surface Mount (BGA) Surface Mount
Configuration Method SRAM-based, requires external PROM/flash —
MSL 等級 3 (per third-party distributor data) —
Lead-Free / RoHS [DATA_NEEDED: lead-free status - older APEX II parts may not be RoHS] —
Embedded Memory ESBs configurable as RAM/ROM/product-term 311,296 bits
Device Type — SPLD / FPGA
Logic Elements / Cells — 24,320
Macros (Logic Cells) — 2432
Typical Gate Count — 600,000 gates
User I/Os — 488 to 508
腳位數 — 652 (functional) / 672 (BGA balls)
Propagation Delay (typical) — 1.48 ns
Internal Frequency (max) — [DATA_NEEDED: max internal frequency in MHz]
Core Supply Voltage — 1.8 V
Package Type — 672-ball BGA, 45 x 45 mm, 1.27 mm pitch
RoHS 狀態 — Compliant per legacy product records
Configuration Interface — JTAG / Passive Serial
Design Tool — Quartus II (legacy MAX+PLUS II)

資料表與資源

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