EP2A70B724C9 vs EP2A70B724C8N 比較
詳細並排比較 EP2A70B724C9 由 Altera 與 EP2A70B724C8N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2A70B724C9 | EP2A70B724C8N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 最後購買 |
| Family | APEX II | FPGA (PLD) |
| Logic Elements | 67200 | — |
| Embedded Memory (bits) | 1146880 | — |
| User I/O Count | 540 | — |
| 封裝 | 724-BBGA, FCBGA (FineLine BGA) | — |
| Process Technology | 0.15 um all-layer copper (up to 8 metal layers) | 0.15 um CMOS, SRAM-based |
| LVDS Channels | Up to 8 LVDS pairs at 1 Gbps | — |
| I/O Standards Supported | True-LVDS, LVPECL, PCML, HyperTransport | — |
| Embedded Memory Type | ESB (synchronous, self-timed WE, true dual-port / simple dual-port / single-port) | — |
| PLLs | Up to 4 | — |
| Speed Grade | C9 (commercial, speed bin 9) | — |
| 工作溫度 | 0C to +85C (commercial) | — |
| Supply Voltage (core) | 1.5 V | — |
| 安裝類型 | Surface Mount (BGA) | Surface Mount (BGA) |
| MSL 等級 | [DATA_NEEDED: MSL level] | — |
| RoHS 狀態 | Non-compliant (per IC-Components listing) | — |
| Series | — | APEX II (EP2A70) |
| System Gates | — | 3,000,000 (3 M) |
| Logic Elements / Cells | — | 67,200 |
| Macrocells | — | 16 |
| Product Terms | — | 32 |
| Propagation Delay | — | 2.49 ns |
| Maximum Internal Clock Frequency | — | 281 MHz |
| Maximum Clock Frequency (fMAX) | — | 1694.91 MHz |
| Core Supply Voltage | — | 1.5 V |
| Architecture | — | PLA-type / LUT-based |
| Package Type | — | FCBGA-724 (square) |
| Number of Pins / Balls | — | 724 |
| Terminal Pitch | — | 1.270 mm |
| Maximum User I/O | — | 536 |