EP2A70B724I7 vs EP2A70B724C8N 比較
詳細並排比較 EP2A70B724I7 由 Intel 與 EP2A70B724C8N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EP2A70B724I7 - APEX II FPGA 3M Gates 67200 Cells 420MHz 1.5V 724-FCBGA | Intel
EP2A70B724I7 Obsolete規格比較
| 參數 | EP2A70B724I7 | EP2A70B724C8N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 最後購買 |
| Family | APEX II | FPGA (PLD) |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements | 67200 | — |
| Maximum System Gates | 3 M | — |
| Embedded Memory | [DATA_NEEDED: ESB bits - 429 Kb or similar] | — |
| Maximum User I/O Pins | approximately 422 (724-pin FCBGA) | — |
| Process Technology | 0.15 um CMOS | 0.15 um CMOS, SRAM-based |
| Core Voltage (VCCINT) | 1.5 V | — |
| I/O Voltages Supported | 1.5 V, 1.8 V, 2.5 V, 3.3 V | — |
| PLL Blocks | 4 | — |
| True-LVDS Channels | 8 | — |
| Maximum Internal Frequency | 420 MHz | — |
| 封裝 | 724-pin FCBGA (FineLine BGA) | — |
| Operating Temperature Grade | Industrial (-40 C to +100 C case) | — |
| Configuration Interface | JTAG (IEEE 1149.1) / IEEE 1532 ISP | — |
| RoHS 狀態 | [DATA_NEEDED: not stated in provided data] | — |
| Series | — | APEX II (EP2A70) |
| System Gates | — | 3,000,000 (3 M) |
| Logic Elements / Cells | — | 67,200 |
| Macrocells | — | 16 |
| Product Terms | — | 32 |
| Propagation Delay | — | 2.49 ns |
| Maximum Internal Clock Frequency | — | 281 MHz |
| Maximum Clock Frequency (fMAX) | — | 1694.91 MHz |
| Core Supply Voltage | — | 1.5 V |
| Architecture | — | PLA-type / LUT-based |
| Package Type | — | FCBGA-724 (square) |
| Number of Pins / Balls | — | 724 |
| Terminal Pitch | — | 1.270 mm |
| 安裝類型 | — | Surface Mount (BGA) |
| Maximum User I/O | — | 536 |