EP2A70B724I9 vs EP2A70B724C8 比較
詳細並排比較 EP2A70B724I9 由 Altera 與 EP2A70B724C8 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2A70B724I9 | EP2A70B724C8 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX II | APEX II |
| Logic Elements | 67,200 | 67200 |
| System Gates | Approximately 3,000,000 | — |
| Embedded Memory | 540 Kbits (1,146,880 bits total ESB memory per Jotrin listing) | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm SRAM |
| Core Voltage | 1.5 V | — |
| Maximum Operating Frequency | 198 MHz | — |
| Number of PLLs | 4 | Up to 4 |
| Embedded System Blocks (ESBs) | 4 | — |
| 封裝 | 724-pin FCBGA (Flip-Chip BGA) | 724-BBGA, FCBGA |
| Operating Temperature Grade | Industrial (-40C to +100C) | — |
| 安裝類型 | Surface Mount | Surface Mount |
| I/O Standards Supported | LVTTL, LVCMOS, SSTL, HSTL, LVDS | — |
| Configuration Mode | SRAM-based, configurable via JTAG or EPC enhanced configuration devices | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance status] |
| Embedded Memory (RAM bits) | — | 1146880 |
| Maximum User I/Os | — | 540 |
| Ball Pitch | — | 1.27 mm |
| Supply Voltage - Core (VCCINT) | — | 1.5 V (typical APEX II value) |
| I/O Bank Voltage (VCCIO) | — | 1.8 V / 2.5 V / 3.3 V / 5 V MultiVolt |
| Configuration Method | — | SRAM-based, serial/parallel via PROM |
| 工作溫度 | — | [DATA_NEEDED: operating temperature grade] |
| True-LVDS Support | — | Yes |
| Number of ESBs (Embedded System Blocks) | — | [DATA_NEEDED: ESB count] |