EP2AGZ225FF35C3G vs EP2AGZ225FF35C4N 比較
詳細並排比較 EP2AGZ225FF35C3G 由 Altera 與 EP2AGZ225FF35C4N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2AGZ225FF35C3G | EP2AGZ225FF35C4N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | Arria II GZ | Arria II GZ |
| Series | Arria II | — |
| Logic Elements (LE) | 225,000 | 224,000 |
| 封裝 | 1152-ball Flip-Chip BGA (FF35) | 1152-BBGA, FCBGA (Flip-Chip BGA) |
| Package Size | 35 mm x 35 mm | 35 mm x 35 mm |
| 工作溫度 | 0C to +85C (Commercial) | 0C to +85C (Commercial) |
| Speed Grade | C3 | C4 |
| Transceivers | Up to 16 channels | — |
| Transceiver Data Rate (max) | 6.375 Gbps | — |
| DSP Blocks | [DATA_NEEDED: count] | — |
| Embedded Memory | [DATA_NEEDED: Mbits] | — |
| User I/O Banks | [DATA_NEEDED: count] | — |
| Maximum User I/O | [DATA_NEEDED: pin count] | — |
| Process Technology | 40 nm TSMC | 40 nm |
| Memory Controller Support | DDR3, DDR2, QDR II+ | — |
| PCI Express Hard IP | Yes (Gen1/Gen2) | — |
| RoHS 狀態 | Compliant | Compliant |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| MSL 等級 | 3 (per JEDEC J-STD-020) | — |
| Lead-Free | Yes | — |
| Adaptive Logic Modules (ALMs) | — | [DATA_NEEDED: ALM count] |
| LABs/CLBs | — | 8,960 |
| Total RAM Bits | — | 14,248,960 (14.25 Mbit) |
| Number of I/O | — | 554 |
| Number of Transceivers | — | 24 |
| Transceiver Data Rate | — | Up to 6.375 Gbps |
| Maximum Operating Frequency | — | 500 MHz |
| Core Voltage | — | 0.9 V |
| Lead Free | — | Yes |
| 濕度敏感等級 (MSL) | — | MS-034 compliant |
| Number of 18x18 Multipliers | — | [DATA_NEEDED: multiplier count] |